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24th IEEE European Test Symposium

(ETS19)
May 27-31, 2019
Baden Baden, Germany

https://www.testgroup.polito.it/ets19/
EARLY REGISTRATION DEADLINE APPROACHING!!!!
CALL FOR PARTICIPATION

About

The IEEE European Test Symposium (ETS) is Europe's premier forum dedicated to presenting and discussing scientific results, emerging ideas, applications, hot topics and new trends in the area of electronic-based circuits and system testing, reliability, security and validation. 

In 2019, ETS will take place in the Congress Center in Baden-Baden. It is organized by the Karlsruhe Institute of Technology (KIT), which co-sponsors the event jointly with the IEEE Council on Electronic Design Automation (CEDA). A Test Spring School will be organized in conjunction with ETS'19.

New initiatives at ETS'19: 
Program highlights:

  • Three outstanding Keynote speeches: Prof. Kaushik Roy (Purdue University, USA), Prof. Shaojun Wei (Tsinghua University, China), Dr. Jochen M¸ller (Bosch GmbH, Germany)
  • Two parallel tutorials on Monday May 27th: "AMS & RF Test" and "System Level Test”
  • 25 technical paper presentations
  • Three special sessions
  • Two embedded tutorials
  • Vendor sessions
  • Embedded Workshop presentations
  • Wine and Cheese Panel 
  • Two full day Workshops

Student activities and promotions:

  • Heavily discounted student registration rate: The organizing committee of ETS'19 is proud to offer extremely low rates for student participation. The student registration rate is reduced to less than half of previous years' rate. The advanced IEEE member student rate is only 150 Euros.
  • Bundle TSS and ETS rates for student participants: With the help of sponsors for TSS, we are able to provide a very low rate for the students to attend both TSS and ETS events. The bundle registration rate is as low as 400 Euros for students attending both TSS and ETS.
  • PhD forum:  The PhD forum provides an excellent opportunity for PhD students to present their ongoing work and get feedback from experts in the field. The forum is organized as a special poster session in an attractive time slot.

Scope:
  • Analog, Mixed-signal and RF Test
  • ATE Hardware and Software
  • Automatic Test Generation
  • Board Test and Diagnosis
  • Boundary Scan Test
  • Built-In Self-Test (BIST)
  • Current-Based Test
  • Defect-Based Test
  • Delay and Performance Test
  • Dependability and Functional Safety
  • Design for Test (DFT)
  • Design for Manufacturing (DFM)
  • Design Verification and Validation
  • Diagnosis and Silicon Debug
  • Economics of Test
  • Failure Analysis
  • Fault Modeling and Simulation
  • Fault Tolerance
  • Hardware Trojans
  • Hardware Security
  • High-Speed I/0 Test
  • GPU Test
  • Low-Power IC Test
  • Memory Test and Repair
  • MEMS Test
  • Microprocessor Test
  • Multi-/Many-core Processor Test
  • Nanotechnology Test
  • On-line Test
  • Power Issues in Test
  • Design for Reliability
  • Reliability-Security Trade-offs
  • Security Issues in Test
  • Self-Repair
  • Signal Integrity Test
  • Stacked or 3D ICs Test
  • Standards in Test
  • System Test
  • SiP and SoC Test
  • Test Synthesis
  • Test, Reliability and Security of Emerging Technologies and Architectures
  • Test of Reconfigurable Systems
  • Test Quality
  • Thermal Issues in Test
  • Transient and Soft Errors
  • Variability Issues in Test
  • Yield Analysis and Enhancement

Registration

Advanced Registration Deadline: April 15, 2019

Symposium and Hotel Registration Link: https://www.testgroup.polito.it/ets19/registration/
Additional Information

For further information, please, contact:

Mehdi Tahoori - General Chair
Karlsruhe Institute of Technology
E-Mail: mehdi.tahoori@kit.edu 

Sybille Hellebrand - Program Chair
Paderborn University
E-Mail: sybille.hellebrand@uni-paderborn.de
For more information, visit us on the web at: https://www.testgroup.polito.it/ets19/

The 24th IEEE European Test Symposium 2019 is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).
IEEE Computer Society-Test Technology Technical Council

TTTC CHAIR
Chen-Huan CHIANG
Intel - USA
E-mail chen-huan.chiang@intel.com

PAST CHAIR
Michael NICOLAIDIS
TIMA laboratory - France
E-mail michael.nicolaidis@imag.fr

TTTC 1ST VICE CHAIR
Matteo SONZA REORDA
Politecnico di Torino - Italy
E-mail matteo.sonzareorda@polito.it

SECRETARY
Joan FIGUERAS
Un. Politec. de Catalunya - Spain
E-mail figueras@eel.upc.es

TEST WEEK COORDINATOR
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

TUTORIALS AND EDUCATION
Paolo BERNARDI
Politecnico di Torino - Italy
E-mail paolo.bernardi@polito.it

STANDARDS
Rohit KAPUR
Synopsys, Inc. - USA
E-mail rkapur@synopsys.com

EUROPE
Giorgio DI NATALE
LIRMM - France
E-mail giorgio.dinatale@lirmm.fr

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Giorgio DI NATALE
LIRMM - France
E-mail giorgio.dinatale@lirmm.fr

  

PRESIDENT OF BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

SENIOR PAST CHAIR
Adith SINGH
Auburn University – USA
E-mail adsingh@eng.auburn.edu

TTTC 2ND VICE CHAIR
Rohit KAPUR
Synopsys, Inc. – USA
E-mail rkapur@synopsys.com

FINANCE
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chen-huan.chiang@alcatel-lucent.com

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES
Matteo SONZA REORDA
Politecnico di Torino - Italy
E-mail matteo.sonzareorda@polito.it

ASIA & PACIFIC
Kazumi HATAYAMA
NAIST - Japan
E-mail k-hatayama@is.naist.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
E-mail champac@inaoep.mx

NORTH AMERICA
André IVANOV
University of British Columbia - Canada
E-mail ivanov@ece.ubc.ca

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

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